`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: Arizona State University
// Engineers: Brentton Garber, Georgii Tkachuk
// 
// Create Date:    15:10:14 02/27/2013 
// Design Name: TFF
// Module Name: TFF 
// Project Name: Lab 1
// Target Devices: Spartan 6 
// Tool versions: 
// Description: 
//
// Dependencies: none
//
// Revision: 1.0
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module TFF(
    input i_toggle,
    input i_clk,
    input i_rst_b,
    output o_t_out
    );

//------------Signal Declarations/Internal Variables-------- 
reg temp_reg_i;       // One clock shifted signal
//-------------Code Starts Here--------- 
always @ (posedge i_clk or negedge i_rst_b) begin
if (i_rst_b == 1'b0)
  temp_reg_i <= 1'b0;
else if(i_toggle == 1'b1)
	temp_reg_i <= !(temp_reg_i);
	
end
assign o_t_out = temp_reg_i; 

endmodule

